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| d a t a sh eet integrated circuits TEA1202TS battery power unit objective speci?cation file under integrated circuits, ic03 2000 jun 08
2000 jun 08 2 philips semiconductors objective speci?cation battery power unit TEA1202TS features fully integrated battery power unit, including complete dc/dc converter circuit, two low dropout voltage regulators (ldos) and a battery low detector configurable for 1, 2 or 3-cell nickel-cadmium (nicd) or nickel metal hybrid (nimh) batteries and 1 lithium ion (li-ion) battery guaranteed dc/dc converter start-up from 1-cell nicd or nimh battery, even with an load current upconversion or downconversion internal power mosfets featuring a low r dson of approximately 0.1 w synchronous rectification for high efficiency soft start pwm-only operating option dropout voltage of 75 mv at 50 ma both ldos are also applicable as low-ohmic power switches stable ldo performance with ceramic capacitors stand-alone low battery detector requires no additional supply voltage low battery detection level at 0.90 v, externally adjustable to a higher level adjustable output voltages shut-down function small outline package advanced 0.6 m m bicmos process. applications cellular phones cordless phones personal digital assistants (pdas) portable audio players pagers mobile equipment. general description the TEA1202TS is a fully integrated battery power unit including a high-efficiency dc/dc converter which runs from a 1-cell nicd or nimh battery, two low dropout voltage regulators and a low battery detector. the circuit can be arranged in many ways to optimize the application circuit of a power supply system. therefore, most inputs and outputs are separated, the dc/dc converter can be arranged for upconversion or downconversion and the regulators can also be used as power switches. one regulator can be used completely independent of the rest of the system, and the low battery detector can be configured for several types of batteries. accurate low battery detection is possible while all other blocks are switched off. the dc/dc converter features efficient, compact and dynamic power conversion using a digital control concept comparable with pulse width modulation (pwm) and pulse frequency modulation (pfm), integrated cmos power switches with a very low r dson and fully synchronous rectification. the device operates at a switching frequency of 600 khz which enables the use of external components with minimum size. the switching frequency can be synchronized to an external high frequency clock signal. optionally, the device can be kept in pwm control mode only. deadlock is prevented by an on-chip undervoltage lockout circuit. active current limiting enables efficient conversion in pulsed-load systems such as global system for mobile communication (gsm) and digital enhanced cordless telecommunications (dect). both ldos show a low dropout voltage and are inherently stable, even when ceramic capacitors with a low esr value are applied at the outputs. usage of the ldos as low-ohmic switches is also possible. the low battery detector has a built-in detection level which is optimum for a 1-cell nicd or nimh battery. higher battery voltages can be translated to this 1-cell level by an additional built-in ldo circuit. ordering information type number package name description version TEA1202TS ssop20 plastic shrink small outline package; 20 leads; body width 4.4 mm sot266-1 2000 jun 08 3 philips semiconductors objective speci?cation battery power unit TEA1202TS quick reference data symbol parameter conditions min. typ. max. unit dc/dc converter u pconversion v i(up) input voltage v i(start) - 5.50 v v o(up) output voltage v o(uvlo) - 5.50 v v i(start) start-up input voltage i l < 10 ma 0.93 0.96 1.00 v d ownconversion v i(dwn) input voltage v o(uvlo) - 5.50 v v o(dwn) output voltage 1.30 - 5.50 v c urrent levels i q quiescent current - 110 -m a i shdwn current in shut-down mode 0 2 10 m a i lx(max) maximum continuous current at pins lx1 and lx2 t amb =80 c -- 1.0 a d i lim current limit deviation i lim set to 1.0 a upconversion - 12 - +12 % downconversion - 12 - +12 % p ower mosfet s r dson(n) drain-to-source on-state resistance nfet t j =27 c - 110 - m w r dson(p) drain-to-source on-state resistance pfet t j =27 c - 125 - m w e fficiency h ef?ciency upconversion v i = 1.2 v; v o up to 3.3 v i l =1ma - 66 - % i l =10ma - 81 - % i l = 100 ma - 85 - % t iming f sw switching frequency pwm mode 480 600 720 khz f i(sync) synchronization clock input frequency 6 1320mhz t start start-up time - 10 - ms low dropout voltage regulators v ldo output voltage range v ldo 2000 jun 08 4 philips semiconductors objective speci?cation battery power unit TEA1202TS this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... block diagram handbook, full pagewidth mgu062 control logic and mode gearbox start-up circuit low battery detector internal supply time counter reference voltage 13 mhz oscillator sync gate temperature protection digital controller sense fet v ref v ref v ref p-type power fet ldo1 shdwn0 v ref ldo2 sense fet shdwn0 gnd0 sync/pwm u/d n-type power fet lx1 lx2 lbo upout/dnin fb0 v ref gnd fb1 out1 fb2 out2 in2 shdwn2 TEA1202TS 18 17 2 19 1 20 14 lbi1 13 lbi2 12 ilim 5 4 7 6 9 10 11 3 8 16 15 current limit comparator fig.1 block diagram. 2000 jun 08 5 philips semiconductors objective speci?cation battery power unit TEA1202TS pinning symbol pin description lx1 1 inductor connection 1 shdwn0 2 dc/dc shut-down input shdwn2 3 ldo2 shut-down input upout/dnin 4 up mode: dc/dc output; down mode dc/dc input ilim 5 current limiting resistor connection out1 6 ldo1 output fb1 7 ldo1 feedback input gnd 8 internal supply ground fb2 9 ldo2 feedback input out2 10 ldo2 output in2 11 ldo2 input lbi2 12 low battery detector input 2 lbi1 13 low battery detector input 1 lbo 14 low battery detector output v ref 15 reference voltage fb0 16 dc/dc feedback input gnd0 17 dc/dc converter ground sync/pwm 18 synchronization clock input or pwm-only selection input u/d 19 conversion mode selection input lx2 20 inductor connection 2 handbook, halfpage TEA1202TS mgu060 1 2 3 4 5 6 7 8 9 10 lx1 shdwn0 shdwn2 upout/dnin ilim out1 fb1 gnd fb2 out2 lx2 u/d sync/pwm gnd0 fb0 v ref lbo lbi1 lbi2 in2 20 19 18 17 16 15 14 13 12 11 fig.2 pin configuration. functional description control mechanism the TEA1202TS dc/dc converter is able to operate in pfm (discontinuous conduction) or pwm (continuous conduction) operating mode. all switching actions are completely determined by a digital control circuit which uses the output voltage level as its control input. this novel digital approach enables the use of a new pulse width and frequency modulation scheme, which ensures optimum power efficiency over the complete range of operation of the converter. when high output power is requested, the device will operate in pwm (continuous conduction) operating mode. this results in minimum ac currents in the circuit components and hence optimum efficiency, minimum costs and low emc. in this operating mode, the output voltage is allowed to vary between two predefined voltage levels. as long as the output voltage stays within this so-called window, switching continues in a fixed pattern. when the output voltage reaches one of the window borders, the digital controller immediately reacts by adjusting the pulse width and inserting a current step in such a way that the output voltage stays within the window with higher or lower current capability. this approach enables very fast reaction to load variations. figure 3 shows the response of the converter to a sudden load increase. the upper trace shows the output voltage. the ripple on top of the dc level is a result of the current in the output capacitor, which changes in sign twice per cycle, times the internal equivalent series resistance (esr) of the capacitor. after each ramp-down of the inductor current, i.e. when the esr effect increases the output voltage, the converter determines what to do in the next cycle. as soon as more load current is taken from the output the output voltage starts to decay. 2000 jun 08 6 philips semiconductors objective speci?cation battery power unit TEA1202TS handbook, full pagewidth mgk925 start corrective action load increase high window limit low window limit v o i l time time fig.3 response to load increase. handbook, full pagewidth mgu061 maximum positive spread maximum negative spread typical situation + 2% - 2% 2% v o v h v l 2% v h v l v h v l 2% fig.4 output voltage window spread. 2000 jun 08 7 philips semiconductors objective speci?cation battery power unit TEA1202TS when the output voltage becomes lower than the low limit of the window, a corrective action is taken by a ramp-up of the inductor current during a much longer time. as a result, the dc current level is increased and normal pwm control can continue. the output voltage (including esr effect) is again within the predefined window. figure 4 shows the spread of the output voltage window. the absolute value is mostly dependent on spread, while the actual window size (v h - v l ) is not affected. for one specific device, the output voltage will not vary more than 2% (typical value). in low output power situations, the TEA1202TS will switch over to pfm (discontinuous conduction) operating mode. in this mode, regulation information from an earlier pwm operating mode is used. this results in optimum inductor peak current levels in the pfm mode, which are slightly larger than the inductor ripple current in the pwm mode. as a result, the transition between pfm and pwm mode is optimum under all circumstances. in the pfm mode the TEA1202TS regulates the output voltage to the high window limit as shown in fig.3. synchronous recti?cation for optimum efficiency over the whole load range, synchronous rectifiers inside the TEA1202TS ensure that during the whole second switching phase, all inductor current will flow through the low-ohmic power mosfets. special circuitry is included which detects when the inductor current reaches zero. following this detection, the digital controller switches off the power mosfet and proceeds with regulation. start-up start-up from low input voltage in the boost mode is realized by an independent start-up oscillator, which starts switching the n-type power mosfet as soon as the low-battery detector detects a sufficiently high voltage. the inductor current is limited internally to ensure soft-starting. the switch actions of the start-up oscillator will increase the output voltage. as soon as the output voltage is high enough for normal regulation, the digital control system takes control over the power mosfets. undervoltage lockout as a result of too high a load or disconnection of the input power source, the output voltage can drop so low that normal regulation cannot be guaranteed. in this event, the device switches back to start-up mode. if the output voltage drops even further, switching is stopped completely. shut-down when the shut-down input is set high, the dc/dc converter disables both switches and power consumption is reduced to a few microamperes. power switches the power switches in the ic are one n-type and one p-type power mosfet, both having a typical drain-to-source resistance of 100 m w . the maximum average current in the power switches is 1.0 a at t amb =80 c. temperature protection when the dc/dc converter operates in the pwm mode, and the die temperature gets too high (typical value is 160 c), the converter and both ldos stop operating. they resume operation when the die temperature falls below 90 c again. as a result, low frequent cycling between the on and off state will occur. it should be noted that in the event of device temperatures at the cut-off limit, the application differs strongly from maximum specifications. current limiters if the current in one of the power switches exceeds the programmed limit in the pwm mode, the current ramp is stopped immediately and the next switching phase is entered. current limiting is required to keep power conversion efficient during temporary high loads. furthermore, current limiting protects the ic against overload conditions, inductor saturation, etc. the current limiting level is set by an external resistor which must be connected between pin ilim and ground for downconversion, or between pins ilim and upout/dnin for upconversion. 2000 jun 08 8 philips semiconductors objective speci?cation battery power unit TEA1202TS external synchronization and pwm-only mode if an external high-frequency clock or a high level is applied to pin sync/pwm, the TEA1202TS will use pwm regulation independent of the load applied. in the event a high-frequency clock is applied, the switching frequency in the pwm mode will be exactly that frequency divided by 22. in the pwm mode the quiescent current of the device increases. in the event that no external synchronization or pwm mode selection is necessary, pin sync/pwm must be connected to ground. behaviour at input voltage exceeding the speci?ed range in general, an input voltage exceeding the specified range is not recommended since instability may occur. there are two exceptions: 1. upconversion: at an input voltage higher than the target output voltage, but up to 5.5 v, the converter will stop switching and the external schottky diode will take over. the output voltage will equal the input voltage minus the diode voltage drop. since all current flows through the external diode in this situation, the current limiting function is not active. in the pwm mode, the p-type power mosfet is always on when the input voltage exceeds the target output voltage. the internal synchronous rectifier ensures that the inductor current does not fall below zero. as a result, the achieved efficiency is higher in this situation than standard pwm-controlled converters achieve. 2. downconversion: when the input voltage is lower than the target output voltage, but higher than 2.2 v, the p-type power mosfet will stay conducting resulting in an output voltage being equal to the input voltage minus some resistive voltage drop. the current limiting function remains active. low dropout voltage regulators the low dropout voltage regulators are functionally equal apart from the shut-down mechanism: ldo2 can be controlled separately by pin shdwn2, while ldo1 is controlled by pin shdwn0 like the dc/dc converter. the input voltage of each ldo must be 250 mv higher than its output voltage to achieve full specification on e.g. ripple rejection. however, the parts will function like an ldo down to a margin of 75 mv between input and output: the so-called dropout voltage. at a lower margin between input and output, the ldos will behave like a resistor. both ldos are protected from overload conditions by a current limiting circuit and high temperature (see section temperature protection). next to normal ldo functions, both regulators can be switched off or can be used as switches. each regulator will act as a low-ohmic switch in the on-state when its feedback input is connected to ground. when the feedback input is higher than 2 v, the regulator will make its power fet high-ohmic. so the feedback inputs of the regulators can be used as digital inputs which make the ldos behave as switches. low battery detector the low battery detector is an autonomous circuit which can work at an input voltage down to 0.90 v. it is always on, even when all other blocks are in the shut-down mode. the detector has two inputs: the input on pin lbi1 is tuned to accept a 1-cell nicd or nimh battery voltage directly, while the input on pin lbi2 can detect a 2-cell nicd or nimh battery voltage or higher voltage. the detection level of the input on pin lbi2 can be set by using a voltage divider between the battery voltage, pin lbi2 and ground. hysteresis is included for proper operating. furthermore, a capacitor of 10 m f (typical value) must be connected between pin lbi1 and ground when the input on pin lbi2 is used. the output of the low battery detector on pin lbo is an open-collector output. the output is high (i.e. no current is sunk by the collector) when the input voltage of the detector is below the lower detection level. 2000 jun 08 9 philips semiconductors objective speci?cation battery power unit TEA1202TS limiting values in accordance with the absolute maximum rating system (iec 60134). note 1. esd specification is in accordance with the jedec standard: a) human body model (hbm) tests are carried out by discharging a 100 pf capacitor through a 1.5 k w series resistor. b) machine model (mm) tests are carried out by discharging a 200 pf capacitor via a 0.75 m h series inductor. 2. exception is pin ilim: 1000 v hbm and 100 v mm. thermal characteristics quality specification in accordance with snw-fq-611 part e . symbol parameter conditions min. max. unit v n voltage on any pin shut-down mode - 0.2 +6.5 v operating mode - 0.2 +5.5 v t j junction temperature - 40 +150 c t amb ambient temperature - 20 +80 c t stg storage temperature - 40 +125 c v es electrostatic handling voltage notes 1 and 2 class ii v symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 140 k/w 2000 jun 08 10 philips semiconductors objective speci?cation battery power unit TEA1202TS characteristics t amb = - 20 to +80 c; all voltages are measured with respect to ground; positive currents ?ow into the ic; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit dc/dc converter u pconversion ; pin u/d = low v i(up) input voltage v i(start) - 5.50 v v o(up) output voltage v o(uvlo) - 5.50 v v i(start) start-up input voltage i l < 10 ma 0.93 0.96 1.00 v v o(uvlo) undervoltage lockout voltage note 1 2.0 2.2 2.4 v d ownconversion ; pin u/d = high v i(dwn) input voltage note 2 v o(uvlo) - 5.50 v v o(dwn) output voltage 1.30 - 5.50 v r egulation d v o(wdw) output voltage window size as a function of output voltage pwm mode 1.5 2.0 2.5 % c urrent levels i q(dcdc) quiescent current note 3 - 110 -m a i shdwn current in shut-down mode 0 2 10 m a i lim(max) maximum current limit - 5 - a d i lim current limit deviation i lim set to 1.0 a; note 4 upconversion - 12 - +12 % downconversion - 12 - +12 % i lx(max) maximum continuous current at pins lx1 and lx2 t amb =80 c -- 1.0 a p ower mosfet s r dson(n) drain-to-source on-state resistance nfet t j =27 c - 110 - m w r dson(p) drain-to-source on-state resistance pfet t j =27 c - 125 - m w e fficiency h ef?ciency upconversion v i = 1.2 v; v o up to 3.3 v; note 5 i l =1ma - 66 - % i l =10ma - 81 - % i l = 100 ma - 85 - % t iming f sw switching frequency pwm mode 480 600 720 khz f i(sync) synchronization clock input frequency 6 1320mhz t start start-up time note 6 - 10 - ms 2000 jun 08 11 philips semiconductors objective speci?cation battery power unit TEA1202TS d igital input levels v ll(n) low-level input voltage on all digital pins 0 - 0.4 v v ih(n) high-level input voltage note 7 on pins sync/pwm, shdwn0 and shdwn2 0.55v 4 - v 4 + 0.3 v all other digital input pins v 4 - 0.4 - v 4 + 0.3 v low dropout voltage regulators; note 8 v ldo output voltage range v ldo 2000 jun 08 12 philips semiconductors objective speci?cation battery power unit TEA1202TS notes 1. the undervoltage lockout level shows wide specification limits since it decreases at increasing temperature. when the temperature increases, the minimum supply voltage of the digital control part of the ic decreases and therefore the correct operation of this function is guaranteed over the whole temperature range. the undervoltage lockout level is measured at pin upout/dnin. 2. when v i is lower than the target output voltage but higher than 2.2 v, the p-type power mosfet will remain conducting (duty factor is 100%), resulting in v o following v i . 3. the quiescent current is specified as the input current in the upconversion configuration at v i = 1.20 v and v o = 3.30 v, using l1 = 6.8 m h, r1 = 150 k w and r2 = 91 k w . 4. the current limit is defined by resistor r10. this resistor must be 1% accurate. 5. the specified efficiency is valid when using an output capacitor having an esr of 0.1 w and an inductor of 6.8 m h with an esr of 0.05 w and a sufficient saturation current level. 6. the specified start-up time is the time between the connection of a 1.20 v input voltage source and the moment the output reaches 3.30 v. the output capacitance equals 100 m f, the inductance equals 6.8 m h and no load is present. 7. v 4 is the voltage at pin upout/dnin. if the applied high-level voltage is less than v 4 - 1 v, the quiescent current of the device will increase. 8. specifications have been verified in the pfm mode. 9. the dropout voltage is defined as the voltage between the input and the output of the ldo when the output voltage has dropped 100 mv below its nominal value. the dropout voltage is measured while the ldo input voltage is decreasing and at maximum current. 10. measured with a sine wave at f i = 100 hz to 1 mhz, v i = 100 mv (rms) and i ldo = 10 ma. general characteristics v ref reference voltage 1.165 1.190 1.215 v i q quiescent current at pin upout/dnin all blocks operating - 270 -m a t amb ambient temperature - 20 +25 +80 c t max internal temperature for cut-off 150 160 170 c symbol parameter conditions min. typ. max. unit 2000 jun 08 13 philips semiconductors objective speci?cation battery power unit TEA1202TS application information handbook, full pagewidth r1 d1 5 4 16 r2 c1 l1 c2 r10 upout/dnin fb0 ilim dc/dc output low battery detection regulator 2 output regulator 1 output dc/dc output r3 r7 6 7 r4 c3 out1 fb1 regulator 1 output regulator 2 shut-down r5 10 9 15 17 8 r6 c4 c5 out2 fb2 vref 3 shdwn2 dc/dc shut-down 2 shdwn0 external clock low battery detection 18 sync/pwm 19 1 20 u/d lx1 lx2 13 11 12 lbi1 in2 lbi2 14 lbo gnd0 mgu063 gnd regulator 2 output dc/dc upconverter low battery detector ldo1 TEA1202TS TEA1202TS ldo2 equivalent block diagram fig.5 application in 1-cell nicd or nimh battery powered equipment. 2000 jun 08 14 philips semiconductors objective speci?cation battery power unit TEA1202TS handbook, full pagewidth r1 d1 5 4 16 r2 l1 c2 r10 upout/dnin fb0 ilim dc/dc output low battery detection regulator 2 output regulator 1 output dc/dc output r3 6 7 r4 c3 out1 fb1 regulator 1 output regulator 2 shut-down r5 10 9 15 17 8 r6 c4 c5 out2 fb2 vref 3 shdwn2 dc/dc shut-down 2 shdwn0 external clock low battery detection 18 sync/pwm 19 1 20 11 13 12 u/d lx1 lx2 in2 14 lbo gnd0 mgu064 gnd regulator 2 output dc/dc upconverter low battery detector ldo1 TEA1202TS TEA1202TS ldo2 equivalent block diagram c1 r7 r8 r9 c6 lbi1 lbi2 fig.6 application in 2-cell nicd or nimh battery powered equipment. 2000 jun 08 15 philips semiconductors objective speci?cation battery power unit TEA1202TS handbook, full pagewidth r1 d1 5 4 16 r2 l1 c2 r10 upout/dnin fb0 ilim dc/dc output regulator 2 output output regulator 1 switch dc/dc output 6 out1 output regulator 1 switch control regulator 1 switch 7 fb1 r5 10 9 15 17 8 r6 c4 c5 out2 fb2 vref 3 shdwn2 2 shdwn0 external clock low battery detection 18 sync/pwm 19 1 20 11 13 12 u/d lx1 lx2 in2 14 lbo gnd0 mgu065 gnd regulator 2 output dc/dc upconverter low battery detector switch ldo1 TEA1202TS TEA1202TS ldo2 equivalent block diagram c1 r7 r8 r9 c6 lbi1 lbi2 control regulator 1 switch low battery detection fig.7 application in 2-cell nicd or nimh battery powered equipment with autonomous shut-down at low battery voltage and using ldo1 as a switch. 2000 jun 08 16 philips semiconductors objective speci?cation battery power unit TEA1202TS handbook, full pagewidth r1 r10 d1 5 1 20 16 r2 c1 l1 c2 upout/dnin fb0 ilim dc/dc output regulator 2 output regulator 1 output dc/dc output r3 r7 r8 r9 6 7 r4 c3 out1 fb1 regulator 1 output regulator 2 shut-down r5 10 9 15 17 8 r6 c4 c5 out2 fb2 vref 13 c6 3 shdwn2 dc/dc shut-down 2 shdwn0 external clock low battery detection 18 sync/pwm 19 4 11 u/d lx1 lx2 12 lbi1 in2 lbi2 14 lbo gnd0 mgu066 gnd regulator 2 output dc/dc downconverter low battery detector ldo1 TEA1202TS TEA1202TS ldo2 equivalent block diagram low battery detection fig.8 application in 3-cell nicd or nimh and 1-cell li-ion battery powered equipment. 2000 jun 08 17 philips semiconductors objective speci?cation battery power unit TEA1202TS external component selection i nductor l1 the performance of the TEA1202TS is not very sensitive to inductance value. the best efficiency performance over a wide load current range is achieved by using an inductance of 6.8 m h e.g. tdk slf7032 or coilcraft do1608 range. dc/dc input capacitor c1 the value of c1 strongly depends on the type of input source. in general, a 100 m f tantalum capacitor is sufficient. dc/dc output capacitor c2 the value and type of c2 depends on the maximum output current and the ripple voltage which is allowed in the application. low-esr tantalum capacitors show good results. the most important specification of c2 is its esr, which mainly determines output voltage ripple. d iode d1 the schottky diode is only used for short time during takeover from n-type power mosfet and p-type power mosfet and vice versa. therefore, a medium-power diode is sufficient in most applications e.g. philips prll5819. f eedback resistors r1 and r2 the output voltage of the dc/dc converter is determined by the resistors r1 and r2. the following conditions apply: use a 1% accurate smd type resistors only. if larger body resistors are used, the capacitance on pin fb0 will be too large, causing inaccurate operation. resistors r1 and r2 should have a maximum value of 50 k w when connected in parallel. a higher value will result in inaccurate operation. under these conditions, the output voltage can be calculated by the formula: c urrent limiting resistor r10 the maximum instantaneous current is set by the external resistor r10. the preferred type is smd, 1% accurate. the connection of resistor r10 differs for each mode: at upconversion: resistor r10 must be connected between pins ilim and upout/dnin; the current limiting level is defined by: at downconversion: resistor r10 must be connected between pins ilim and gnd0; the current limiting level is defined by: the average inductor current during limited current operation also depends on the inductance value, input voltage, output voltage and resistive losses in all components in the power path. ensure that i lim 2000 jun 08 18 philips semiconductors objective speci?cation battery power unit TEA1202TS ldo feedback resistors r3, r4, r5 and r6 the output voltage of each ldo can be set by the external feedback resistors. their values can be derived from the formulae: the maximum value for each of the ldo feedback resistors is 500 k w . l ow battery detector components r7, r8, r9 and c6 resistor r7 is connected between pin lbo and the input or output pin and must be 330 k w or higher. a 1-cell nicd or nimh battery can be connected directly to pin lbi1. a higher battery voltage must be applied to pin lbi2 using a divider circuit with resistor r8 and r9. in that situation, capacitor c6 (10 m f) must be connected between pin lbi1 and ground. the low-battery detection level for a higher battery voltage can be set by the resistors at pin lbi2 using the formula: v o v ref 1 r3 r4 ------- - + ? ? ? = v o v ref 1 r5 r6 ------- - + ? ? ? = v lbi2 0.90 1 r8 r9 ------- - + ? ?? = 2000 jun 08 19 philips semiconductors objective speci?cation battery power unit TEA1202TS package outline unit a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 0.15 0 1.4 1.2 0.32 0.20 0.20 0.13 6.6 6.4 4.5 4.3 0.65 1.0 0.2 6.6 6.2 0.65 0.45 0.48 0.18 10 0 o o 0.13 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.20 mm maximum per side are not included. 0.75 0.45 sot266-1 mo-152 95-02-22 99-12-27 w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a x (a ) 3 a y 0.25 110 20 11 pin 1 index 0 2.5 5 mm scale ssop20: plastic shrink small outline package; 20 leads; body width 4.4 mm sot266-1 a max. 1.5 2000 jun 08 20 philips semiconductors objective speci?cation battery power unit TEA1202TS soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c. 2000 jun 08 21 philips semiconductors objective speci?cation battery power unit TEA1202TS suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable 2000 jun 08 22 philips semiconductors objective speci?cation battery power unit TEA1202TS data sheet status note 1. please consult the most recently issued data sheet before initiating or completing a design. data sheet status product status definitions (1) objective speci?cation development this data sheet contains the design target or goal speci?cations for product development. speci?cation may change in any manner without notice. preliminary speci?cation quali?cation this data sheet contains preliminary data, and supplementary data will be published at a later date. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. product speci?cation production this data sheet contains ?nal speci?cations. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2000 jun 08 23 philips semiconductors objective speci?cation battery power unit TEA1202TS notes ? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 2000 69 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, via casati, 23 - 20052 monza (mi), tel. +39 039 203 6838, fax +39 039 203 6800 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5057 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland : al.jerozolimskie 195 b, 02-222 warsaw, tel. +48 22 5710 000, fax. +48 22 5710 001 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 58088 newville 2114, tel. +27 11 471 5401, fax. +27 11 471 5398 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2886, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: yukari dudullu, org. san. blg., 2.cad. nr. 28 81260 umraniye, istanbul, tel. +90 216 522 1500, fax. +90 216 522 1813 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 208 730 5000, fax. +44 208 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 3341 299, fax.+381 11 3342 553 printed in the netherlands 403502/25/01/pp 24 date of release: 2000 jun 08 document order number: 9397 750 06773 |
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